发明名称 Junction field effect transistor, integrated circuit for switching power supply, and switching power supply
摘要 A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.
申请公布号 US9461115(B2) 申请公布日期 2016.10.04
申请号 US201213594985 申请日期 2012.08.27
申请人 FUJI ELECTRIC CO., LTD. 发明人 Saito Masaru;Sonobe Koji
分类号 H01L29/06;H01L27/098;H01L29/10;H01L29/808;H02M1/36 主分类号 H01L29/06
代理机构 Rossi, Kimms & McDowell LLP 代理人 Rossi, Kimms & McDowell LLP
主权项 1. An integrated circuit (IC) for a switching power supply, the IC comprising: a power source terminal; a MOSFET having a drain terminal and a gate terminal; and a start-up circuit comprising a JFET that includes: a semiconductor substrate of a first conductivity type;a drain region of a second conductivity type in the semiconductor substrate;a drift region of the second conductivity type in the semiconductor substrate;a plurality of source regions of the second conductivity type in the semiconductor substrate;a drain electrode electrically connected to the drain region; anda plurality of source electrodes including a first source electrode electrically connected to at least one of the plurality of source regions, and a second source electrode electrically connected to at least another of the plurality of source regions and electrically isolated from the first source electrode,wherein the plurality of source regions are formed circumferentially around the drift region, wherein the drain electrode of the JFET is electrically connected to the power source terminal, and wherein the drain terminal of the MOSFET is connected to part of the first source electrode of the JFET, and the gate terminal of the MOSFET is electrically connected to the second source electrode of the JFET.
地址 Kawasaki-Shi JP