发明名称 |
Non-volatile memory and semiconductor device |
摘要 |
There is provided a non-volatile memory including: plural zener zap devices, each including a cathode region and an anode region formed in a well; and a metal wiring line that is formed above the plural zener zap devices, that is commonly connected to each of the cathode regions, and that supplies a write voltage to each of the zener zap devices. |
申请公布号 |
US9461056(B2) |
申请公布日期 |
2016.10.04 |
申请号 |
US201514930827 |
申请日期 |
2015.11.03 |
申请人 |
LAPIS Semiconductor Co., Ltd. |
发明人 |
Otsuka Masayuki |
分类号 |
G11C17/16;H01L27/112;G11C17/18;H01L29/866 |
主分类号 |
G11C17/16 |
代理机构 |
Studebaker & Brackett PC |
代理人 |
Studebaker & Brackett PC |
主权项 |
1. A non-volatile memory comprising:
a plurality of zener zap devices, each of the zener zap devices including a cathode region on each side of an anode region and a dual-presence region in which both a cathode region and an anode region are present between each cathode region and the respective side of the anode region, wherein the plurality of zener zap devices are arranged in a linear direction such that a zener zap device of the plurality of zener zap devices shares two cathode regions with adjacent zener zap devices of the plurality of zener zap devices; and a metal wiring line overlapping each dual-presence region of the plurality of zener zap devices, commonly connected to each of the cathode regions. |
地址 |
Yokohama JP |