发明名称 ARITHMETIC OPERATION PROCESSOR
摘要 PROBLEM TO BE SOLVED: To obtain an arithmetic operation processor which has an operation speed that is almost equal to when a buffer is inserted inside a shift circuit and can further reduce power consumption in a barrel shift circuit. SOLUTION: In a barrel shift circuit composed of a multistage selector, when data does not have to be transmitted to the selector of the next stage to an output of a selector realizing large shift, a long wire does not have to be driven other than when needed by providing a data blocking means 101 instead of a buffer, and the power consumption of the arithmetic operation processor can be reduced.
申请公布号 JP2000293354(A) 申请公布日期 2000.10.20
申请号 JP19990101058 申请日期 1999.04.08
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIYOSHI AKIRA
分类号 G06F5/01;(IPC1-7):G06F5/01 主分类号 G06F5/01
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