| 摘要 |
PURPOSE: A semiconductor device and a method for manufacturing the same are provided to reduce efficiently the wiring capacity in a wiring structure including a dummy wiring for flattening an interlayer dielectric. CONSTITUTION: An N-type source and a drain region are formed on a P-type silicon substrate(1) by using a photo-lithography process and an ion implantation process. An MOS-type transistor is formed thereon by growing the first interlayer dielectric(7). A contact hole is formed on the first interlayer dielectric(7). A plug conductor is formed by burying the contact hole. The second interlayer dielectric(10) is grown on the first interlayer dielectric(7). A trench(11) is formed on the second interlayer dielectric(10). A conductive layer is formed on the second interlayer dielectric(10). The first wiring(8), the second wiring(9), and a dummy wiring(18) are formed thereon. The third interlayer dielectric is grown on a whole face of the second interlayer dielectric(10). |
