发明名称 CONVERSION CIRCUIT FOR SYNCHRONIZING FREQUENCY
摘要 PROBLEM TO BE SOLVED: To convert a synchronizing frequency of an input video signal so that a CRT is able to correspond to plural pairs of horizontal and vertical synchronizing frequencies. SOLUTION: This conversion circuit is provided with 1st circuits 54, 55 for generating a write control signal S5W varying correspondingly to the horizontal and vertical synchronizing frequencies of an input video signal S11, and memory 43 in which the input video signal S11 is written. The circuit is provided with a discriminating circuit 52 for discriminating the horizontal and vertical synchronizing frequencies of the input video signal S11, and a PLL 60 for outputting a clock S61 controlled by the discrimination result of the discriminating circuit 52 and varying in frequency. The circuit is further provided with 2nd circuits 54, 55 for forming a discrimination output of the discriminating circuit 52 and a read-out control signal S5R from the clock S61. By supplying the read-out control signal S5R to the memory 43, the circuit reads from the memory 43 the video signal being written therein at an almost constant horizontal synchronizing frequency irrespective of the horizontal synchronizing frequency of the input video signal S11.
申请公布号 JP2001166755(A) 申请公布日期 2001.06.22
申请号 JP19990350078 申请日期 1999.12.09
申请人 SONY CORP 发明人 YAMAZAKI NOBUO
分类号 H04N5/073;G09G1/16;G09G5/00;(IPC1-7):G09G5/00 主分类号 H04N5/073
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