| 摘要 |
PROBLEM TO BE SOLVED: To provide a redundancy circuit in which layout area is decreased and delay of access is reduced. SOLUTION: Plural redundancy selecting signal lines are made common every plural lines and connected to input terminals of a 3 input NAND gate 5 from redundancy selecting circuits 2A, 2B, 2C in which address decode-signal lines 1A, 1B, 1C are connected to its input terminal and a redundancy cell selecting signal line is connected to its output terminal, and a redundancy cell selecting signal is outputted. And a fuse 7B is connected to only one redundancy cell selecting signal line 30B inputted to the NAND gate 5, and the other end of the fuse 7B is grounded.
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