发明名称 DATA PROCESSING APPARATUS WITH A CACHE MEMORY AND METHOD OF USING SUCH AN APPARATUS
摘要 <p>A data processing apparatus has a main memory that contains memory locations with mutually different access latencies. Information from the main memory is cached in a cache memory. When cache replacement is needed selection of a cache replacement location depends on differences in the access latencies of the main memory locations for which replaceable cache locations are in use. When an access latency of a main memory location cached in the replaceable cache memory location is relatively smaller than an access latency of other main memory locations cached in other replaceable cache memory locations, the cached data for that main memory location is replaced by preference over data for the other main memory locations, because of its smaller latency.</p>
申请公布号 WO2002003207(A1) 申请公布日期 2002.01.10
申请号 EP2001007088 申请日期 2001.06.22
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址