发明名称 Split-gate flash cell for virtual ground architecture
摘要 In this invention bit lines are ion implanted into a semiconductor substrate in columns beside floating gates of an array of flash memory cells. A control gate overlays each row floating gates and operates as a word lines for the rows of flash memory cells. Each bit line serves a dual purpose of providing a drain for one cell and a source for the adjacent cell. The flash memory cells are programmed, erased and read depending upon the voltages applied to the buried bit lines and the word line structured as a control gate that extends the length of each row. By implanting the bit lines into the semiconductor substrate the flash memory cell can be made smaller improving the density of the flash memory.
申请公布号 US6344997(B2) 申请公布日期 2002.02.05
申请号 US20010858527 申请日期 2001.05.17
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 SUNG HUNG-CHENG;KUO DIN-SON;HSIEH CHIA-TA;LIN YAI-FEN
分类号 G11C16/04;H01L21/8247;H01L27/115;(IPC1-7):G11C16/04 主分类号 G11C16/04
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