发明名称 |
DUPLEX SWITCH BOARD AND DUPLEXING METHOD |
摘要 |
PURPOSE: A duplex switch board and a duplexing method are provided to decrease a power consumption being generated in a non-activated switch board by minimizing a system clock being supplied in the non-activated switch board using a system clock control unit in each dual switch board. CONSTITUTION: I/O bus interface units, switch units, control units, and system clock control units are connected to an I/O bus. Processor interface units are connected to a processor bus. The system clock control unit includes the below elements. A control status sensing unit(310) senses a status of a control unit and creates a value corresponded to a switch mode. An external processor status sensing unit(320) checks a status of an external processor and creates a value corresponded to the switch mode. A system clock unit(340) creates a clock in accordance with the value created through the control status sensing unit(310) and the external processor status sensing unit(320). A system clock control device(330) controls the clock of a switch board independently using values received from the control status sensing unit(310) and the external processor status sensing unit(320) and the clock received from the system clock unit(340).
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申请公布号 |
KR20020048502(A) |
申请公布日期 |
2002.06.24 |
申请号 |
KR20000077639 |
申请日期 |
2000.12.18 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
KIM, GI MIN;LEE, HYEONG HO;LEE, HYEONG SEOP;LEE, SANG U |
分类号 |
G06F1/00;(IPC1-7):G06F1/00 |
主分类号 |
G06F1/00 |
代理机构 |
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