| 摘要 |
PROBLEM TO BE SOLVED: To provide an interface to connect a burst bus with a random bus, which eliminates necessity for a weight processing on the burst bus side and permits a time-out processing, etc., by software on the burst bus side. SOLUTION: The interface is furnished internally with an address base register 103 and data registers 107-114 to specify the address and data, respectively, when access is to be tried to the random bus, a write command register 104 and a read command register 105, and a status register 106 to acquire the access progress information, and access to the random bus is made by means of access to these registers. Accordingly the burst bus is released while a state machine 119 is conducting random access with the random bus, which eliminates necessity for the weight processing on the burst bus side, and also this permits time-out processing, etc., using software.
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