发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To facilitate process for a gate electrode of a CMIS circuit, including a dual-gate electrode structure. SOLUTION: The CMIS circuit, which includes the dual-gate electrode structure, is formed on a SOI substrate. The thickness of the gate electrodes 4A, 4B of nMISQn and pMISQp, forming the CMIS circuit, is set almost equal to or a slightly larger than that of the semiconductor layer IC of the SOI substrate 1.
申请公布号 JP2002270849(A) 申请公布日期 2002.09.20
申请号 JP20010069643 申请日期 2001.03.13
申请人 HITACHI LTD 发明人 WADA SHINICHIRO;MORI KAZUTAKA
分类号 H01L27/08;H01L21/8238;H01L27/092;H01L29/786;(IPC1-7):H01L29/786;H01L21/823 主分类号 H01L27/08
代理机构 代理人
主权项
地址