发明名称 CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY
摘要 PURPOSE: To provide a control circuit in which response speed of a device can be increased for external request when internal request and external request are overlapped. CONSTITUTION: A semiconductor device 30 is provided with a first signal processing circuit 31 including a filter 35 and a second signal processing circuit 32 including no filter, it is decided by an arbiter 33 which signal has priority for a second output signal S3 from the second signal processing circuit 32 or a first output signal S4, and a discrimination signal S5 based on the decided result is outputted to a main signal generating circuit 34. The main signal generating circuit 34 receives a signal S2 from the first signal generating circuit 31 and the signal 5 from the arbiter 33, and outputs a main signal S6 generated by logic-synthesizing the both signals S2, S5. The decision signal S5 is outputted more quickly comparing with the case in which the output signal S2 of the first signal processing circuit 31 is used, in the same way, the main signal S6 also is outputted more quickly comparing with the case in which decision is performed using the first output signal S2.
申请公布号 KR20020077642(A) 申请公布日期 2002.10.12
申请号 KR20020004363 申请日期 2002.01.25
申请人 FUJITSU LIMITED 发明人 ITO SHIGEMASA
分类号 G11C7/00;G11C11/403;G11C11/406;G11C11/4076;H03K19/0175;(IPC1-7):G11C7/00 主分类号 G11C7/00
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