SUB WORD LINE DRIVING CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: A sub word line driving circuit of a semiconductor memory device is provided, which enables a stable refresh, by preventing a voltage of an inactive sub word line from being increased due to an electrostatic capacity with an adjacent sub word line. CONSTITUTION: A sub word line driving part(10) comprises a PMOS transistor(11) whose gate is connected to a main word line and its drain is connected to a sub word line driving signal(PX signal) input port and the first NMOS transistor(12) whose gate is connected to the main word line and its source is connected to a ground port. The NMOS transistor is connected to the source of the PMOS transistor in serial. A discharge part(20) is connected to an output port of the sub word line driving part and discharges charges increasing in the sub word line in response to a discharge part driving signal(PX bar) while an adjacent word line is activated. And a switching part(30) is connected serially to the discharge part and applies a negative voltage to the inactivated sub word line during an initial activation period of the adjacent word line.