| 摘要 |
PROBLEM TO BE SOLVED: To improve responsiveness when switching digital setting data, to suppress ripple after switching and to enable stable output in a D/A converter for converting digital data to a PWM pulse and converting it to an analog voltage through a low-pass filter (LPF). SOLUTION: The PWM pulse outputted from the terminal of an ASIC 15 having the PWM pulse generating circuit (composed of a counter and a comparator) of a duty ratio corresponding to the digital setting data is inputted after selecting any one of a plurality of different LPF (with R1C and R2C as a time constant) by an SW. When switching the digital setting data, the filter of the small time constant is selected and the response of analog output is accelerated. After the lapse of prescribed time, the filter of the large time constant is selected as ordinary operation and a ripple voltage generated in the output is suppressed.
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