ANNEALED METAL SOURCE DRAIN UNDER GATE

摘要

A method of forming a field effect transistor is provided. The method of forming a field effect transistor may include forming a dummy gate perpendicular to and covering a channel region of a semiconductor fin, such that a source drain region of the semiconductor fin remains uncovered, depositing a metal layer above and in direct contact with a sidewall of the dummy gate, and above and in direct contact with a top and a sidewall of the source drain region, and forming a metal silicide source drain in the source drain region by annealing the metal layer and the semiconductor fin, such that the metal silicide source drain overlaps the dummy gate.

主权项

1. A method of forming a field effect transistor comprising:
forming a dummy gate perpendicular to and covering a channel region of a semiconductor fin, such that a source drain region of the semiconductor fin remains uncovered; depositing a metal layer above and in direct contact with a sidewall of the dummy gate, and above and in direct contact with a top and a sidewall of the source drain region; forming a metal silicide source drain in the source drain region by annealing the metal layer and the semiconductor fin, such that the metal silicide source drain overlaps the dummy gate; depositing an insulator layer directly on the metal silicide source drain, directly adjacent to the dummy gate; removing the dummy gate and creating an opening, such that a sidewall of the opening is the insulator layer and a bottom of the opening is coplanar with a top of the channel region of the semiconductor fin and a bottom edge of the opening overlaps with the metal silicide source drain which extends beneath the opening; conformally depositing a gate dielectric in direct contact with a bottom and a lower portion of the sidewall of the opening; forming a metal gate in the opening in direct contact with the gate dielectric such that an upper portion of the sidewall of the opening remains at a top of the gate dielectric and a top of the metal gate; forming a gate cap in the upper portion of the opening, in direct contact with the top of the gate dielectric and the top of the metal gate; forming a gate cap spacer above and in direct contact with the metal gate; and removing a portion of the insulator layer, such that a remaining portion of the insulator layer is directly adjacent to the metal gate and forms a gate sidewall spacer.