发明名称 |
Self-planarizing process for shallow trench isolation |
摘要 |
Described is a method to form isolation structures on a semiconductor substrate. This method begins with forming one or more trenches in the semiconductor substrate and depositing a first portion of a dielectric layer at a first rate by a High Density Plasma-Chemical Vapor Deposition into the trenches and onto the semiconductor substrate. This first deposition at least partially fills the trenches and may completely fill the trenches. Next, a second portion of the dielectric layer is deposited at a second rate by the High Density Plasma-Chemical Vapor Deposition over the semiconductor substrate to partially planarize the dielectric layer. This second deposition is preferably performed with a different flow rate of reaction gasses than the first deposition. Finally, a portion of the dielectric layer that was deposited at the second rate is removed by a CMP process, for example.
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申请公布号 |
US6573152(B1) |
申请公布日期 |
2003.06.03 |
申请号 |
US20000687213 |
申请日期 |
2000.10.12 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
FAZIO BARBARA;CURRO GIULIANA;NASTASI NICOLA |
分类号 |
H01L21/316;H01L21/762;(IPC1-7):H01L21/76 |
主分类号 |
H01L21/316 |
代理机构 |
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