| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory circuit in which relieving probability by a redundant cell is improved by reducing a compressibility in a test and a test time can be shortened by enabling simultaneous measurement by a tester. SOLUTION: A memory circuit of multi-bits output constitution has memory cores having a normal cell array and a redundant cell array, and an output circuit provided between output terminals of N pieces from which output of N bits read out from the memory cores are outputted respectively and memory cores, it is detected whether output of each L bits (N=L×M) out of output of N bits read out from the memory cores coincide ot not, when they coincide, they are made output data, when they are non-coincidence, compression output being a third state is outputted to a first output terminal out of the output terminals of N pieces. Compression output of L bits output of the M group is outputted with time division responding respectively to a plurality of test command. Thereby, a relieving rate of redundant cells can be improved and a simultaneous measurement rate of a test device can be improved. COPYRIGHT: (C)2003,JPO
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