发明名称 METHOD FOR FORMING COPPER LINE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a copper line of a semiconductor device is provided to prevent a current concentration by forming a via hole of dual damascene, a barrier metal and a plug into the via hole, a trench of the dual damascene, and the barrier metal and an upper line into the via hole. CONSTITUTION: The first interlayer dielectric(100) is formed on a semiconductor substrate. A lower line(104) is formed on the first interlayer dielectric. The first diffusion barrier(106), the second interlayer dielectric(108,110), and the second diffusion barrier(112) are formed on the resultant. A via hole is formed by etching the second diffusion barrier and the first diffusion barrier. The first barrier metal is formed on a sidewall of the via hole. A plug(120) is formed by burying copper into the via hole. The third interlayer dielectric is formed on the resultant. A trench is formed by etching the third interlayer dielectric. The second barrier metal is formed on a sidewall of the trench of the third interlayer dielectric. An upper line(128) is formed by burying the copper or copper alloy into the trench.
申请公布号 KR20030058439(A) 申请公布日期 2003.07.07
申请号 KR20010088893 申请日期 2001.12.31
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 KUEM, DONG RYEOL
分类号 H01L21/3205;(IPC1-7):H01L21/320 主分类号 H01L21/3205
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