发明名称 Method, apparatus and system for a per-dram addressability mode
摘要 Techniques and mechanisms for programming an operation mode of a dynamic random access memory (DRAM) device. In an embodiment, a memory controller stores a value in a mode register of a DRAM device, the value specifying whether a per-DRAM addressability (PDA) mode of the DRAM device is enabled. An external contact of the DRAM device is coupled to the memory controller device via a signal line of a data bus. In another embodiment, the memory controller sends a signal to the external contact while the PDA mode of the DRAM device is enabled, the signal to specify whether one or more features of the DRAM device are programmable.
申请公布号 GB2516400(B) 申请公布日期 2016.12.28
申请号 GB20140020667 申请日期 2013.06.05
申请人 Intel Corporation 发明人 Kuljit Bains
分类号 G11C7/10;G11C11/4063;G11C11/4096 主分类号 G11C7/10
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