发明名称 Memory device and process for improving the state of a termination
摘要 A memory device and process for improving the state of one or more terminations according to process, voltage, and/or temperature variations, including a delay looped circuit (DLL). The memory device has one or more terminations to which one or more variable resistance circuits are connected and through which one or more external signals are passed for operating the memory device, and a control circuit for generating a control signal for controlling one or more resistance values of the variable resistance circuits, in response to a command enable signal that represents the activation of another operation and an external enable signal that activates the DLL in the memory device. After the state of the one or more terminations is improved by the control signal, the DLL is enabled. External signals can be received after improving the state of the terminations according to process, voltage, and/or temperature variations, thereby improving input/output characteristics.
申请公布号 US6714465(B2) 申请公布日期 2004.03.30
申请号 US20020272944 申请日期 2002.10.18
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JANG SEONG-JIN
分类号 G11C11/409;G11C7/10;G11C7/22;G11C8/00;(IPC1-7):G11C7/00 主分类号 G11C11/409
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