发明名称 |
Dirty tag bits for 3D-RAM SRAM |
摘要 |
An external cache management unit for use with a 3D-RAM frame buffer and suitable for use in a computer graphics system is described. The unit may reduce power consumption within the 3D-RAM by performing partial block write-back according to status information stored in an array of dirty tag bits. Periodic level one cache block cleansing is provided for during empty memory cycles.
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申请公布号 |
US6720969(B2) |
申请公布日期 |
2004.04.13 |
申请号 |
US20010861172 |
申请日期 |
2001.05.18 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
LAVELLE MICHAEL G.;KUBALSKA EWA M.;TANG YAN YAN |
分类号 |
G06F12/08;G06T1/60;G06T15/00;G09G5/36;G09G5/39;(IPC1-7):G09G5/36 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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