发明名称 ARITHMETIC PROCESSING UNIT AND CONTROL METHOD FOR ARITHMETIC PROCESSING UNIT
摘要 PROBLEM TO BE SOLVED: To provide an arithmetic processing unit and a processing method which improve a memory access efficiency.SOLUTION: A cache control part 32 includes: a cache hit determination part; a read counting part which increments a count value of a read instruction when a memory access instruction executed by an arithmetic processing part is the read instruction; and a write counting part which increments a count value of a write instruction when a memory access instruction executed by the arithmetic processing part is the write instruction. The cache control part also includes: a substitution reference generation part which generates a capacity of a target read region and a capacity of a target write region to minimize an average memory access time required for access to a main memory unit by responding to a cache mistake determined by a cache mistake determination part based on the count value of the read instruction counted by the read counting part and the count value of the write instruction counted by the write counting part; and a substitution control part which controls the substitution of a region of a cache memory 35 on the basis of the capacity of the target read region and the capacity of the target write region.SELECTED DRAWING: Figure 2
申请公布号 JP2016170682(A) 申请公布日期 2016.09.23
申请号 JP20150050729 申请日期 2015.03.13
申请人 FUJITSU LTD 发明人 SHIMIZU TAKASHI;MIYOSHI TAKASHI
分类号 G06F12/12;G06F12/08 主分类号 G06F12/12
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