| 摘要 |
PROBLEM TO BE SOLVED: To stably manufacture a semiconductor device by measuring the size of a gate electrode on the activation region of a circuit pattern or a QC pattern, with high accuracy in a size inspection stage. SOLUTION: A wiring width profile is acquired from image data to be measured, and the dimensions of a lower layer, such as, the width and pitch of the activation region are acquired from a design database; and an activation analysis region is set with the width and pitch acqired, and the position from an end of the image is denoted as (x). The average value of the wiring width of the activation analysis region is calculated as AEI_A(x). When the position (x) is moved from 0 to T, the average value AEI_A(x) of the wiring width varies according to a pitch structure of the lower layer. When the activation area of the lower layer coincides with the activation analysis region, the average value AEI_A(x) of the wiring width reaches a maximum value. The extremum value is used, as the measurement result of the gate electrode on the activation area, to manage the manufacturing steps of the semiconductor device. COPYRIGHT: (C)2009,JPO&INPIT
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