Integrated circuit interconnects and methods of making same

摘要

A copper alloy layer is blanket deposited over a low k dielectric layer and in via openings within the low k dielectric layer. The blanket deposited layer is then anisotropically etch to form horizontal interconnects. The interconnects are annealed to form a metal oxide barrier lining. A second low k dielectric layer is then depositing over the horizontal interconnects. Air gaps can be formed between adjacent interconnects to lower parasitic capacitance therebetween.

主权项

1. An integrated circuit interconnect structure comprising:
a first dielectric layer; a continuous copper alloy feature extending vertically into and over the first dielectric layer, a second copper alloy feature extending horizontally over the first dielectric layer; a continuous copper oxide barrier layer disposed on sidewalls, a top surface, and a bottom surface of the continuous copper alloy feature; a second dielectric layer between the continuous copper alloy feature and the second copper alloy feature; and an air gap within the second dielectric layer, wherein the air gap is between the continuous copper alloy feature and the second copper alloy feature.