发明名称 MEMORY DRIVER CIRCUIT
摘要 1402299 Electric protective systems HONEYWELL INFORMATION SYSTEMS Inc 9 Nov 1972 [13 Dec 1971] 51870/72 Heading H2K [Also in Division H3] An electronic driver circuit used for driving capacitive loads C L comprises a thermal protective network 23 electrically coupled to first and second controllable networks 21, 22, the thermal protective network 23 being responsive to thermal changes for disabling the first and second controllable networks 21, 22 when the temperature sensed by the thermal protective network 23 exceeds a specified temperature and input means 20 electrically coupled to a drive signal input terminal 10 and to the first and second controllable networks 21, 22 causing the first network 21 to be conducting and the second network 22 to be non-conducting in response to a first level of input signal 10 and causing the first network 21 to be non-conducting and the second network 22 to be conducting in response to a second level of input signal 10. As shown when the input voltage 10 is low - 15 V. (Fig. 3, not shown) Q 1 -Q 3 are off and Q 4 , Q 5 are on to charge load capacitor C L to +5 V. A status indicator network 24 provides a "1" output at 13 with Q 10 on and Q 11 off in response to that + 5 V. output at 12. When the input voltage 10 is high - 9 V. Q 1 -Q 3 turn on to discharge the load capacitance C L . Initially Q 1 and Q 2 discharge stray capacitance C s . This discharge occurs more rapidly than Q 3 is able to discharge the load capacitance C L . The difference between these two discharge rates ensures that Q 4 and Q 5 are non-conducting during the initial operation of network B until C s is discharged. When D 5 begins to conduct Q 2 and Q 3 function as a Darlington amplifier. D 5 helps to discharge the load but D 5 stops conducting when the voltage at the output terminal 12 falls to - 13 V. thereby allowing Q 3 to saturate and provide maximum voltage swing. Diode D1 is optional and is used for providing additional hold off bias for Q 4 and Q 5 . The output of the status indicator network 24 becomes "O" at 13 with Q 10 off and Q 11 on. At a certain temperature such as 150‹ C. with V cc - 15 V. the voltage across a diode D13 having a negative temperature coefficient desaturates Q 9 . This turns on Q 7 and Q 8 so as to turn off Q 1 -Q 5 to disable the networks A and B. The output 13 of the indicator network 24 becomes "O". The thermal protection network 23 is sensitive to overvoltage of the power supply V cc . If the voltage V cc is for example - 20 V. the protection network 23 disables the networks A and B at 25‹ C. The thermal protection network 23 may provide similar protection for overvoltages of the power supplies V aa and V bb . The circuit may be constructed in integrated form and may be used for driving semi-conductor memory arrays such as MOSFET's. A diode D 12 provides compensation for the temperature effects of the transistor Q 9 .
申请公布号 AU4897972(A) 申请公布日期 1974.05.23
申请号 AU19720048979 申请日期 1972.11.17
申请人 HONEYWELL INFORMATION SYSTEMS INC. 发明人 WARWICK R. ABBOTT
分类号 G11C11/413;G06F12/16;G11C5/00;G11C7/04;H02H5/04;H03K17/08;H03K17/082;H03K17/66 主分类号 G11C11/413
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