发明名称 情報処理装置およびその制御方法
摘要 The objective of the present invention is to suppress a decrease in communication speed. An information processing device (1) is provided with interface circuits (11-1 to 11-n), a switch (12), and a control unit (13). The interface circuits (11-1 to 11-n) each have a communication port (P), and via the communication port (P), control an input/output interface with apparatuses. The switch (12) is a matrix switch positioned between the interface circuits (11-1 to 11-n) and the apparatuses (D1 to Dm), and on the basis of switch instructions, switches connections between each communication port (P) of the interface circuits (11-1 to 11-n) and the apparatuses (D1 to Dm). The control unit (13), in accordance with the loads of the communication ports of the interface circuits (11-1 to 11-n), outputs switch instructions so as to control the switch (12).
申请公布号 JP6024752(B2) 申请公布日期 2016.11.16
申请号 JP20140527914 申请日期 2012.08.02
申请人 富士通株式会社 发明人 山本 茂樹
分类号 G06F13/14;G06F13/36;G06F13/38 主分类号 G06F13/14
代理机构 代理人
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