发明名称 Execution units for implementation of context adaptive binary arithmetic coding (CABAC)
摘要 A digital processor for recovering a source bitstream from an encoded bitstream that has been encoded according to a context adaptive binary arithmetic coding (CABAC) algorithm. The processor includes a first execution unit and a second execution unit. The first execution unit generates first execution data by operating on a first register and a second register, and stores the first execution data in the first register. The first execution data includes a current output bit, a temporary range value and a temporary offset value. The current output bit corresponds to a bit of the source bitstream. The second execution unit generates second execution data by operating on the first register and the second register, and stores the second execution data in the second register. The second execution data includes a normalized range value and a normalized offset value.
申请公布号 US9485507(B2) 申请公布日期 2016.11.01
申请号 US201414150144 申请日期 2014.01.08
申请人 Advanced Micro Devices, Inc. 发明人 Frank Michael
分类号 H04N7/12;G06F7/38;H04N19/91;H04N19/13;H04N19/64;H04N19/44;H04N19/436 主分类号 H04N7/12
代理机构 Meyertons Hood Kivlin Kowert & Goetzel, P.C. 代理人 Meyertons Hood Kivlin Kowert & Goetzel, P.C. ;Hood Jeffrey C.;Brightwell Mark K.
主权项 1. A digital processor for recovering a source bitstream from an encoded bitstream that has been encoded according to a context adaptive binary arithmetic coding (CABAC) algorithm, the processor comprising: a first execution unit configured to generate first execution data by operating on a first register and a second register, and to store the first execution data in the first register, wherein the first execution data includes a current output bit, a temporary range value and a temporary offset value, wherein the current output bit corresponds to a bit of the source bitstream; a second execution unit configured to generate second execution data by operating on the first register and the second register and to store the second execution data in the second register, wherein the second execution data includes a normalized range value and a normalized offset value.
地址 Sunnyvale CA US