发明名称 |
Shift register, display device and method for driving display device |
摘要 |
The present disclosure provides a shift register, a display device, and a method for driving the display device. A pull-down module and a stop module are added in the shift register. When a full screen picture is displayed, the signal output port outputs a high-level signal to the gate line connected with the signal output port, such that the gate line scans the display panel of the display device normally. The pull-down module may maintain the pull-up node and the signal output port at a low-level during the non-working time of the shift register, so as to prevent the shift register from outputting noise. When a local picture is displayed, under the control of the stop signal input port Stop, the stop module outputs the low-level signal to the gate line connected with the signal output port, such that the gate line stops scanning the display panel. |
申请公布号 |
US9495931(B2) |
申请公布日期 |
2016.11.15 |
申请号 |
US201414540287 |
申请日期 |
2014.11.13 |
申请人 |
BOE TECHNOLOGY GROUP CO., LTD.;BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. |
发明人 |
Chen Xiaochuan;Wang Shijun;Wang Lei;Xue Yanna;Jiang Wenbo;Li Yue;Bao Zhiying;Lv Zhenhua;Xiao Wenjun |
分类号 |
G11C19/00;G09G3/36;G11C19/28 |
主分类号 |
G11C19/00 |
代理机构 |
Harness, Dickey & Pierce, P.L.C. |
代理人 |
Harness, Dickey & Pierce, P.L.C. |
主权项 |
1. A shift register, comprising: a pull-up driver module, a pull-down driver module, a pull-up control module, a pull-down control module, a pull-down module, and a stop module, wherein:
the pull-up driver module is configured to turn on the pull-up control module through a pull-up node under a control of a signal input port and a first reference signal port; the pull-down driver module is configured to turn off the pull-up control module through the pull-up node under a control of a reset signal port and a second reference signal port; the pull-up control module is configured to connect a first clock signal port and a signal output port under a control of the pull-up node; the pull-down control module is configured to connect a low-level signal port and the signal output port under a control of a second clock signal port; the pull-down module is configured to maintain the pull-up node and the signal output port at a low-level during non-working time of the shift register, and to be connected with the signal output port, the pull-up node, the low-level signal port, and the first clock signal port; and the stop module is configured to maintain the signal output port at the low-level under a control of a stop signal input port, and to be connected with the stop signal input port, the pull-up node, the pull-down module, and the low-level signal port, wherein the stop module comprises a first thin film transistor (TFT) and a second TFT, a gate electrode of the first TFT and a drain electrode of the first TFT both being connected with the stop signal input port, a source electrode of the first TFT being connected with the pull-down module, a gate electrode of the second TFT being connected with the stop signal input port, a drain electrode of the second TFT being connected with the pull-up node, and a source electrode of the second TFT being connected with the low-level signal port. |
地址 |
Beijing CN |