发明名称 Apparatus and method for memory copy at a processor
摘要 A processor uses a dedicated buffer to reduce the amount of time needed to execute memory copy operations. For each load instruction associated with the memory copy operation, the processor copies the load data from memory to the dedicated buffer. For each store operation associated with the memory copy operation, the processor retrieves the store data from the dedicated buffer and transfers it to memory. The dedicated buffer is separate from a register file and caches of the processor, so that each load operation associated with a memory copy operation does not have to wait for data to be loaded from memory to the register file. Similarly, each store operation associated with a memory copy operation does not have to wait for data to be transferred from the register file to memory.
申请公布号 US9524162(B2) 申请公布日期 2016.12.20
申请号 US201213455800 申请日期 2012.04.25
申请人 Freescale Semiconductor, Inc. 发明人 Tran Thang M.;Yang James
分类号 G06F12/00;G06F9/30;G06F12/08;G06F9/38 主分类号 G06F12/00
代理机构 代理人
主权项 1. A method, comprising: receiving a first load instruction and a first store instruction of a memory copy operation, wherein the memory copy operation is an operation that copies a block of data from a first portion of a first cache of one or more caches to a second portion of the first cache, wherein a second cache of the one or more caches is a lower level of memory hierarchy as compared to the first cache; in response to determining the first load instruction is associated with the memory copy operation, determining whether first data associated with the first load instruction in the first portion of the first cache is also in the second cache; in response to the first data associated with the first load instruction also being in the second cache, transferring the first data associated with the first load instruction from the second cache to the second portion of the first cache; in response to the first data associated with the first load instruction not also being in the second cache, transferring the first data associated with the first load instruction from the first portion of the first cache to a buffer; and in response to determining the first store instruction is associated with the memory copy operation, transferring the first data from the buffer to the second portion of the first cache, the buffer is separate from a register file of a processor and the one or more caches.
地址 Austin TX US