发明名称 LOGICAL CIRCUIT
摘要 <p>PURPOSE:To realize high concentration as well as high speed by arranging transistors in such a way that more than two units of transistor may not be aligned adjacently on one input line, by changing combination between input line and output line respectively.</p>
申请公布号 JPS52116129(A) 申请公布日期 1977.09.29
申请号 JP19760032575 申请日期 1976.03.26
申请人 HITACHI LTD 发明人 INADATE MASAAKI
分类号 G11C17/00;G11C11/413;G11C17/12;H01L21/8246;H01L27/112;H03K19/013;H03K19/177;H03M7/00 主分类号 G11C17/00
代理机构 代理人
主权项
地址