MEMORY SYSTEMS HAVING IMPROVED OUT-OF-ORDER EXECUTION OF COMMANDS AND METHODS FOR OPERATING THE SAME

摘要

A memory device controller includes a main processor and a sequencer. The sequencer is configured to: estimate a time interval required to complete execution of a set of atom commands allocated to a channel of a non-volatile memory; calculate, for each of the plurality of atom commands, an urgency value associated with completing execution of a corresponding memory command after expiration of the time interval required to complete execution of the set of atom commands allocated to the channel; schedule each of the plurality of atom commands in the set of atom commands for execution by the non-volatile memory based on the calculated urgency values; and output the plurality of atom commands to the non-volatile memory for execution in the scheduled order.

主权项

1. A memory device controller, comprising:
a main processor configured to allocate a set of atom commands to a channel among a plurality of channels of a non-volatile memory, the set of atom commands including a plurality of atom commands, each of the plurality of atom commands being a portion of a memory command from among a plurality of memory commands, and each of the plurality of atom commands being applicable to at least one sector of the non-volatile memory; and a sequencer configured to,
estimate a time interval required to complete execution of the set of atom commands allocated to the channel,calculate, for each of the plurality of atom commands, an urgency value associated with completing execution of a corresponding memory command after expiration of the time interval required to complete execution of the set of atom commands allocated to the channel,schedule each of the plurality of atom commands in the set of atom commands for execution by the non-volatile memory based on the calculated urgency values, andoutput the plurality of atom commands to the non-volatile memory for execution in the scheduled order.