| 发明名称 |
Vertically integrated memory cell |
| 摘要 |
A vertically integrated memory cell including a deep trench extending into a substrate, a trench capacitor located within the deep trench, and a vertical transistor at least partially embedded within the deep trench above the trench capacitor, the vertical transistor is in direct contact with and electrically coupled to the trench capacitor. |
| 申请公布号 |
US9466614(B2) |
申请公布日期 |
2016.10.11 |
| 申请号 |
US201414289679 |
申请日期 |
2014.05.29 |
| 申请人 |
International Business Machines Corporation |
发明人 |
Barth, Jr. John E.;Khan Babar A. |
| 分类号 |
H01L21/00;H01L27/12;H01L21/84;H01L29/66;H01L27/108 |
主分类号 |
H01L21/00 |
| 代理机构 |
|
代理人 |
Kelly L. Jeffrey;Meyers Steven |
| 主权项 |
1. A vertically integrated memory cell comprising:
a deep trench extending into a semiconductor-on-insulator substrate comprising an SOI layer, a buried oxide layer, and a base layer; the buried oxide layer is located below the SOI layer and above the base layer, and the buried oxide layer electrically insulates the SOI layer from the base layer; a trench capacitor located within the deep trench; and a vertical transistor at least partially embedded within the deep trench above the trench capacitor, the vertical transistor is in direct contact with and electrically coupled to the trench capacitor, and a gate of the vertical transistor is located within the SOI layer and surrounds the deep trench. |
| 地址 |
Armonk NY US |
