发明名称 TEST PATTERN GENERATOR FOR LSI
摘要 PURPOSE:To ensure easy and quick formation of the test patteren in an economical way by extracting the combination of the input/output signals in case a coincided action is secured between the LSI in the same type and in the single unit state and the LSI in the constitution of the electronic computer. CONSTITUTION:LSI2 on board 1 of the small-scale electronic computer consitution is made to execute the test program in which various kinds of orders are collected to confirm the logic function of LSI2 among LSI2 and 3 which are once approved as the non-defective units by the user and are to be the abjects of the test pattern formation. In this case, only the signals that are supplied for LSI2 to execute the program are selected (4) among the signals emerging at all input terminals of LSI2 and then supplied to LSI3. When coincidence 5 is recognized for the output signals between LSI2 and 3 against the same input signal under execution of the test program, the input/output signals are memorized in series in memory 6 as part of the test pattern.
申请公布号 JPS5456335(A) 申请公布日期 1979.05.07
申请号 JP19770122384 申请日期 1977.10.14
申请人 HITACHI LTD 发明人 YAMADA TOMOHISA
分类号 G01R31/28;G01R31/26;G01R31/3183;G06F11/00;G06F11/22;H01L21/66;H03K3/78 主分类号 G01R31/28
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