发明名称 SIMULATION UNIT
摘要 PURPOSE:To enhance the productivity of test by making it possible to advance simulation in an arbitrary time. CONSTITUTION:When an operator depresses start button 1, pulse generator 6 is started to start initial model 9 in model memory 8. Counters corresponding to the number of models are provided in counter group 7, and operation times of models are pre-set to these counters. Pulse generator 6 is inputted into these counters and decreases numeric values, which are set to these counters, by one successively. Then, when a counter becomes ''0'', one of model memories 11 to 13 corresponding to the counter is operated to operate a required model at each simulation time. If the extension or the reduction of the actual time of the model operation time is instructed by accelerating/decelerating unit 2, a numeric value written to each counter 7 is made large or small according to this instruction.
申请公布号 JPS5498153(A) 申请公布日期 1979.08.02
申请号 JP19780004204 申请日期 1978.01.20
申请人 HITACHI LTD 发明人 OOKOUCHI OSAMU;KATAOKA HIDEO;USUI KATSUO;HAYASHI TOSHIHIRO
分类号 G06F19/00;G06T19/00 主分类号 G06F19/00
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