| 摘要 |
PURPOSE:To shorten the search time of the automatic channel selection in the PLL frequency synthesizer system radio receiver, by suitably combining the search modes of plurality different in the frequency step. CONSTITUTION:The reception signal from the antenna input A is in high frequency amplification at the high frequency amplification and frequency conversion circuit 1, converted into intermediate frequency according to the frequency from the PLL circuit 4, amplified at the intermediate amplifying circuit 2, and outputted from the speaker output B via the detection circuit 3. When the search instruction signal of up and down is inputted from the terminal U or D, FF15 is set and the control section 17 selects the mode. The reception frequency is determined with the coded output of the data memory 6 controlling the PLL circuit 4, and if colrrect tuning is not made in a given time, the mode is changed and control is made so that the tuning is obtained by changing the scanning control frequency step of the PLL circuit 4. |
