发明名称 DATA PROCESSING SYSTEM
摘要 <p>PURPOSE:To keep the uniformity of display luminance required, even if the write- in speed of the reception data is changed, by rejecting the interference signal mixed to the periodical input signal and setting the short distance range. CONSTITUTION:The reception data by #0 transmission pulse is added to the shift register 6-1 via the AND 5-1 over the time axis of the write-in gate, and when the write-in clock C is fed via the AND 9-1 and OR11, the write-in for all the data to be written in is finished. Next, the time width tR of the readout gate G to read out the data from the shift register is made as tR/tW=n to the write-in gate time tW, and by taking the time ratio n as 1 or more for a short distance range and 1 or less for the long distance range, the readout speed can always be constant independently of the write-in speed. Thus, even if the write-in speed for the reception data is changed, the uniformity of display luminance required and sufficient can be kept.</p>
申请公布号 JPS557606(A) 申请公布日期 1980.01.19
申请号 JP19780079260 申请日期 1978.07.01
申请人 TOKYO KEIKI KK 发明人 NUMAYASU YOSHIO;OOYAMA TAKASHI;MIYASHITA TAKEO
分类号 G01S7/292;G01S7/04;G01S7/295 主分类号 G01S7/292
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