发明名称 INTEGRATED MEMORY CELL
摘要 PURPOSE:To make highly sensitive the memory operation, by taking the signal stored in the memory cell itself as the complementary signal of potential and delivering the complementary memory signal to the bit line connected to the both ends of the sense amplifier. CONSTITUTION:The storage of the information of the memory cell 10 is made with the complementary charge stored in the capacitor Cs. For example, when the signal 1 is stored in the cell 10, the charge at high potential is stored at the node N1 and the charge at low potential is stored at the node N2. When the word line W is at high level, the information in the cell 10 is read out at the bit wires B1 and B2, and the potential difference is in existence between the both wires with the potential change through the conduction of the transistors Q1 and Q2, it is amplified with the sense amplifier 20 and delivered as the memory cell information to the output circuit.
申请公布号 JPS5512576(A) 申请公布日期 1980.01.29
申请号 JP19780085518 申请日期 1978.07.12
申请人 NIPPON ELECTRIC CO 发明人 TAKADA TADAHIDE
分类号 G11C11/405;G11C11/403 主分类号 G11C11/405
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