发明名称 DIRECTTCURRENT BIAS GENERATING CIRCUIT
摘要 PURPOSE:To make it possible to obtain a direct-current bias capable of canceling variation in circuit operation due to variation in power voltage, etc., by providing a voltage divider circuit composed of IG-FET and an amplifier which inverts and amplifies divided voltages. CONSTITUTION:The voltage divider circuit consists of enhancement IG-FETs 11 and 13 and depletion IG-FET12, and the amplifier circuit which inverts and amplifies divided voltage (a) consists of enhancement IG-FETs 14 and 15; a voltage at connection point (b) is applied as a direct-current bias to the circuit formed in the same substrate as those circuit. Next, when direct-current applied voltage VDD becomes higher than a normal value, the voltage at point (a) rises and voltage V(b) at point (b) falls linearly according to variation in VDD. Namely, since direct- current bias V(b) varies to cancel variation in VDD, even if caused, variance in operation of the IG-FET circuit applied with this direct-current bias is canceled. When threshold voltage Vth of FETs 11 to 13 varies, it is canceled in the same way.
申请公布号 JPS5526747(A) 申请公布日期 1980.02.26
申请号 JP19780099658 申请日期 1978.08.16
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 UCHIDA KAZUYUKI;ENDOU MAKOTO
分类号 H03F1/30;H03F3/16;H03K5/13 主分类号 H03F1/30
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