发明名称 Method of manufacturing complementary insulated gate field effect semiconductor device by multiple implantations and diffusion
摘要 A semiconductor substrate of an N type is formed partially of a well region of a P type by means of a first ion implantation process, then subjected to selective diffusion to form source and drain regions of a P type on the surface of the original substrate, whereby a first insulated gate field effect transistor is formed, and further subjected to selective diffusion to form source and drain region of an N type in the well, whereby a second insulated gate field effect transistor is formed. The semiconductor device is then subjected to a second ion implantation process such that an impurity of an N type is simultaneously ion implanted in the substrate surface surrounding at least the first field effect transistor and the channel region of the second field effect transistor, and is then subjected to formation of an insulation film such that a thick insulation film is formed on the surface of the original substrate and the well, while a thin gate insulation film is formed on the channel regions of the first and second field effect transistors. Then the device is further subjected to a third ion implantation process such that an impurity of a P type is ion planted to the channel regions of the first and second field effect transistors through the thin gate insulation films.
申请公布号 US4217149(A) 申请公布日期 1980.08.12
申请号 US19790014922 申请日期 1979.02.26
申请人 SANYO ELECTRIC CO LTD;TOKYO SANYO ELECTRIC CO LTD 发明人 SAWAZAKI, TAMAKI
分类号 H01L21/8238;(IPC1-7):H01L21/26;H01L21/22;H01L7/54 主分类号 H01L21/8238
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