| 摘要 |
PURPOSE:To perform the delta modulation coding by securing a wide dynamic range with a simple circuit constitution and without increasing the high-speed integrated pulse frequency. CONSTITUTION:Step size information 110 is applied to converter circuit 210 of step size generator circuit 111 to be separated into integrating frequency designation signal 211-1 of three bits and selection signal 211-2 of delta or Kdelta (K>1). And one sampling cycle to be executed is designated at integrating circuit 113 and via signal 211-1. At the same time, the increase/decrease amount of local decoding signal 103 to be delivered in one integration is indicated to delta or Kdelta at circuit 113 and via signal 211-2. Then sampling clock pulse 114 is applied to presetable counter 204 via delay circuit 202, and signal 211-1 is preset to counter 204. And the contents of counter 204 is decreased by high-speed pulse 207 which is obtained by supplying high-speed clock pulse 201 to gate 206. Then the step size is decided, and decoding signal 103 securing a wide dynamic range is delivered through circuit 113. |
