发明名称 HAAR CONVERTER
摘要 <p>PURPOSE:To make it possible for a simple circuit to perform Haar conversion at a high speed by using two integral A/D converters alternatively. CONSTITUTION:Gate waveform generating circuit 1 generates gate waveform P1 and pulse P2 from a signal showing timing pulse S and integral period T. Waveform P1 becomes logic ''1'' synchronizing with the rise point of pulse S and alternates logic ''1'' with ''0'' at period T. Gate circuits 2, 3, while waveform P1 is logic ''1'' or ''0'', allow signal X(v) to pass through and it is input to integral A/D converter 5 or 6. Converter 5 integrates signal X(v) for period T and when waveform becomes logic ''0'', the integral value is A/D converted before being output to AND gate 7. Converter 6, on the other hand, integrates signal X(v) for period T and when waveform P1 becomes logic ''1'', the integral value is output to AND gate 8 being A/D-converted. The outputs of gates 7 and 8 are input in parallel to register 10 via OR gate 9 at the point in time of pulse P2 and register 10 outputs sequentially output X11 varying at every period T.</p>
申请公布号 JPS55138178(A) 申请公布日期 1980.10.28
申请号 JP19790044803 申请日期 1979.04.12
申请人 MITSUBISHI ELECTRIC CORP 发明人 TACHIBANA YASUO
分类号 G06F17/14;G06K9/52;G06T9/00 主分类号 G06F17/14
代理机构 代理人
主权项
地址