Cumulative error detection in data transmission

摘要

Circuitry for providing error check values for indicating errors in data portions within a data stream. The circuitry comprises error detecting code generation circuitry configured to apply an error detecting code algorithm to the data stream and to thereby generate and periodically update a multi-bit check value as the data stream is processed, each update of the multi-bit check value being indicative of the error detecting code generation circuitry receiving a further item of the data stream. An output for periodically outputting a fragment of the multi-bit check value from the error detecting code generation circuitry during the processing of the data stream, the fragments output each corresponding to a data portion of the data stream. Wherein each of the fragment of the multi-bit check value provides a value indicative of an error occurring either in the corresponding portion of the data stream or in an earlier portion of the data stream.

主权项

1. Circuitry for providing error check values for indicating errors in data portions within a data stream comprising:
error detecting code generation circuitry configured to apply an error detecting code algorithm to said data stream and to thereby generate and periodically update a multi-bit check value as said data stream is processed, each update of said multi-bit check value being indicative of said error detecting code generation circuitry receiving a further item of said data stream; an output for periodically outputting a fragment of said multi-bit check value from said error detecting code generation circuitry during said processing of said data stream, said fragments output each corresponding to a data portion of said data stream; wherein: each of said fragments of said multi-bit check value provides a value indicative of an error occurring either in said corresponding portion of said data stream or in an earlier portion of said data stream; said data stream comprises a burst of data; and said error detecting code generation circuitry is configured to output said complete multi-bit check value having processed said burst of data.