发明名称 MEMORY CONTROL CIRCUIT FOR TELEVISION DISPLAY
摘要 PURPOSE:To prevent a horizontal counter from being reset due to a noise, by counting step-out pulses and by resetting the counter only when the count value exceeds a setpoint. CONSTITUTION:Synchronism deciding circuit 22 is supplied with output G1 of decoder 21 that generates a pulse of pulse width nearly equal to a horizontal synchronous period every time vertical counter 3 makes a round of operation, output TM of gate signal generator 14 and reference pulse SP of waveform shaping circuit 12. Then, if horizontal counter 2 operates asynchronously with horizontal synchronizing signal HS, deciding circuit 22 generates pulse train KPT. Counter 24 counts it and, when its count value exceeds a prescribed setpoint, resets horizontal counter 2 forcibly. Thus, horizontal counter 2 can be prevented from being reset due to a noise.
申请公布号 JPS5648778(A) 申请公布日期 1981.05.02
申请号 JP19790125167 申请日期 1979.09.28
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 MATSUSHITA AKIRA
分类号 H04N7/025;H04N7/00;H04N7/03;H04N7/035 主分类号 H04N7/025
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