发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To eliminate the irregularity in the predetermined characteristic of a D/A converter by providing floating and external gates between the source and the drain in a substrate and a plurality of floating gate FETs having different ratios of electrostatic capacities between the floating and external gates with respect to the electrostatic capacity between the floating gate and the substrate. CONSTITUTION:D/A or A/D converter is formed by a plurality of floating gate type FETs T1-T3 having floating gates 4 and external gates 5 between the source 2 and the drain 3 in the substrate 1. The first gate film between the substrate 1 and the floating gate 4 and the second gate film between the floating gate 4 and the external gate 5 are formed in thickness constantly, and the ratios of the electrostatic capacity C1 between the floating gate and the substrate to the electrostatic capacity C2 are formed differently in the respective FETs T1-T3, thereby varying the threshold value VTH. Thus, a plurality of floating gate type FETs having different threshold values can be formed merely by varying the size of the pattern, thereby eliminating the irregularity in the predetermined properties simply.
申请公布号 JPS5676559(A) 申请公布日期 1981.06.24
申请号 JP19790153618 申请日期 1979.11.29
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 NOZAWA HIROSHI
分类号 H01L27/04;H01L21/822;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;H03M1/00 主分类号 H01L27/04
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