| 摘要 |
In a static RAM comprising cross coupled FETs Q1, Q2 one of the power supply lines is eliminated by connecting the load elements R1, R2 to the data lines. Both load elements may be connected to the same data line D as shown or alternatively to data line D or each resistor may be separately connected to one or other of the data lines D, D. The load elements have a high value which together with the capacitance at the data nodes 1 and 2 provides a long time constant and when writing into a cell the appropriate data line is pushed for period shorter than the time constant of the load circuits so that cells connected to the same data line are not affected unless the row address line RA is energised. <IMAGE> |
