| 摘要 |
PURPOSE:To achieve the execution of two microinstruction words at a time, by adding a memory sufficient for the storage of a simultaneous operation instruction bits, simultaneous operation instruction circuit, two microinstruction registers and decoder. CONSTITUTION:Simultaneous operation instruction bits of microinstruction words muA-muC stored in a control memory 2 are set with 1, 0. The instruction word muA read out through the designation of a control memory address register 1 is stored in registers 3, 4 and an FF7 is set to 1 with the simultaneous operation instruction bits, the instruction word muA from the registers 3, 4 is not interpreted at decoders 5, 6 and no operation instruction is made. Next, the instruction word muB is read out and since the instruction bit is 0, the FF7 is 0, the register 3 stores muB but stores the muA, and the register 4 stores the muB unconditionally. The muA is interpreted at the decoder 5 by making the FF7 zero, an operation instruction signal A is given via a gate 8, the muB is interpreted from the decoder 6 and an operation instruction signal B is given via a gate 9. |
