| 摘要 |
PURPOSE:To manufacture a circuit, which has high mobility and leakage currents thereof are low, by executing crystallinity improving treatment through the ion implantation and heat treatment of an SOS structure semiconductor layer only to a surface layer in an NchE type element region and to the whole layer in NchD type and Pch element regions. CONSTITUTION:An Si film 2 by which an N channel E/D type or CMOS type inverter, etc. are prepared is grown onto a sapphire substrate 1 in thickness such as 0.3mum. Si ions are implanted (120keV, 2X10<15>cm<-2>) in the whole surface, the surface up to 0.2mum depth is changed into an amorphous layer 3, and a layer 4, crystallinity thereof is improved, is formed through heat treatment. A resist mask 5 is shaped to the NchE type FET forming region 6, Si ions are implanted (200keV, 10<15>cm<-2>) again, and the interface side is turned into amorphous layer 3. The resist is removed, the surface is thermally treated, and the amorphous layer 3 is converted into the crystallized layer 4. Accordingly, the interface leakage of the capacity element region 6, to the surface thereof a channel is shaped, can be reduced while the various characteristics of an SOSIC can be improved by the effect of the amelioration of crystallinity. |
