Scannable flip-flop and low power scan-shift mode operation in a data processing system

摘要

A scannable flip-flop circuit and method for low power scan operation are provided. The scannable flip-flop includes a flip-flop for receiving an input signal, and for generating a flip-flop output signal. The scannable flip-flop also includes a voltage selection circuit coupled to the flip-flop. The voltage selection circuit supplies a first voltage to the flip-flop during a first state of a voltage selection signal, and supplies a second voltage to the flip-flop during a second state of the voltage selection signal. A series of scannable flip-flops may be arranged in a scan chain for testing during a scan test mode.

主权项

1. A scannable flip-flop comprising:
a flip-flop for receiving an input signal, and for generating a flip-flop output signal; and a voltage selection circuit coupled to the flip-flop, the voltage selection circuit for supplying a first voltage to the flip-flop during a first state of a voltage selection signal, and for supplying a second voltage to the flip-flop during a second state of the voltage selection signal, the voltage selection circuit comprising:
a P-channel transistor having a first current electrode coupled to a VDD voltage supply, a control electrode coupled to the voltage selection signal, and a second current electrode for providing the first voltage; andan N-channel transistor having a first current electrode coupled to a VDD voltage supply, a control electrode coupled to the voltage selection signal, and a second current electrode for providing the second voltage.