| 摘要 |
PURPOSE:To obtain plural output signals having oscillation frequencies or duty cycles by providing a PLL circuit with voltage-controlled oscillators which differ in time constant, and allowing one of those oscillators to drive the other voltage- controlled oscillators by its output control voltage. CONSTITUTION:A PLL circuit consists of a phase comparator 1 receiving an input signal, a loop filter 2, and voltage-controlled oscillators 3-i (i=1-n) driven by its output control voltage V. The output of the oscillator 3-1 is phase-compared with the input signal by the comparator 1. When the output of Schmitt trigger circuit 6i of the oscillator 3-i is at a level H, a switch SW7i is closed to charge a capacitor Ci with a current from a contant current source 4i, thus raising a voltage at a point Ai. When the voltage at the point Ai reaches a high threshold value, the output of the circuit 6i is inverted to a level L and while the SW7i is opened, a SW8i is closed to discharge the Ci through a constant current source 5i; when the voltage at the point Ai reaches a low threshold value, the output of the circuit 6i is inverted again to a level H, and this operation is repeated to perform oscillation. The oscillation time constants of respective oscillators are made different to output signals having different frequencies. |
