Multiple-time programmable memory

摘要

A multiple-time programmable (MTP) structure is provided that can operate using a power supply with a supply voltage of 1.5 V to 5.5 V. When the supply voltage is above a first voltage, a first circuit is configured to induce a second constant voltage at a drain of a second transistor, and to induce the second constant voltage on a terminal in a third circuit. In some embodiments, the third circuit provides a third constant voltage on a gate of a third transistor. When the supply voltage is below the first voltage, a fifth circuit is configured to induce a fourth constant voltage on a terminal in the third circuit. The fourth constant voltage is substantially equal to the second constant voltage.

主权项

1. A multiple-time programmable (MTP) memory structure, comprising:
a first transistor; a second transistor comprising a first source/drain region directly coupled to a first source/drain region of the first transistor at a node; a third transistor operably coupled between the node and a bit line; a fourth transistor operably coupled between the bit line and a voltage source and operably coupled between the third transistor and the voltage source; a first circuit configured to induce a first constant voltage at a second source/drain region of the first transistor; and a second circuit configured to induce a second constant voltage at a gate of the fourth transistor.